Knowledge Organiser: Fetch-Decode-Execute Cycle
Part of Fetch-Decode-Execute Cycle · GCSE GCSE Computer Science revision
This topic summary covers Knowledge Organiser: Fetch-Decode-Execute Cycle within Fetch-Decode-Execute Cycle for GCSE Computer Science. Revise Fetch-Decode-Execute Cycle in Systems Architecture for GCSE Computer Science with 15 exam-style questions and 12 flashcards. This topic appears regularly enough that it should still be part of a steady revision cycle. It is section 10 of 10 in this topic. Use this topic summary to connect the idea to the wider topic before moving on to questions and flashcards.
Topic position
Section 10 of 10
Practice
15 questions
Recall
12 flashcards
Knowledge Organiser: Fetch-Decode-Execute Cycle
Key Terms
- Fetch: Stage where the next instruction is retrieved from memory into the CPU
- Decode: Stage where the Control Unit interprets what the instruction means
- Execute: Stage where the ALU carries out the instruction
- CIR: Current Instruction Register — holds the instruction being decoded/executed
- Opcode: The operation part of an instruction (e.g. ADD, LOAD, STORE)
- Operand: The data or address part of an instruction (e.g. the value 5 in ADD 5)
Must-Know Facts
- FETCH sequence (4 steps): PC → MAR; address sent via Address Bus; instruction sent via Data Bus → MDR → CIR; PC increments
- DECODE: Control Unit reads the instruction in CIR — no register values change
- EXECUTE: ALU performs the operation; result stored in ACC
- PC increments during FETCH — not during decode or execute
- ACC is updated during EXECUTE — not during fetch or decode
- Nothing changes in registers during DECODE stage
- The cycle repeats billions of times per second
Key Concepts
- FDE cycle is the fundamental operation of every CPU — all programs are just repeated FDE cycles
- Fetch path: PC → MAR → Address Bus → memory → Data Bus → MDR → CIR
- Decode: CU reads opcode from CIR and prepares the correct ALU operation
- Execute: ALU performs arithmetic/logic; result overwrites ACC
Common Mistakes
- Saying "Fetch, Decode, Execute" in the wrong order: It is always Fetch THEN Decode THEN Execute — you cannot decode before you have fetched
- Forgetting the PC increments during Fetch: The PC increments as part of the Fetch stage, not after — so it already points to the next instruction before Execute finishes
- Saying the ALU does the decoding: The Control Unit (CU) decodes the instruction — the ALU only performs calculations during Execute
- Mixing up CIR and MDR: The MDR holds data temporarily from the data bus; the CIR holds the current instruction being decoded — they are different registers
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Practice Questions for Fetch-Decode-Execute Cycle
What does FDE stand for in computer science?
Describe the three stages of the FDE cycle.
Quick Recall Flashcards
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