Systems ArchitectureExam Tips
Exam Tips - FDE Cycle
Part of Fetch-Decode-Execute Cycle — GCSE Computer Science
This exam tips covers Exam Tips - FDE Cycle within Fetch-Decode-Execute Cycle for GCSE Computer Science. Revise Fetch-Decode-Execute Cycle in Systems Architecture for GCSE Computer Science with 15 exam-style questions and 12 flashcards. This topic appears regularly enough that it should still be part of a steady revision cycle. It is section 9 of 9 in this topic. Treat this as a marking guide for what examiners are looking for, not just a fact list.
Topic position
Section 9 of 9
Practice
15 questions
Recall
12 flashcards
Exam Tips - FDE Cycle
The FETCH sequence is a guaranteed 4-mark question! Learn this by heart:
- Line 1: "PC is copied to MAR" (1 mark)
- Line 2: "Address sent via Address Bus to memory" (1 mark)
- Line 3: "Instruction sent via Data Bus to MDR, then copied to CIR" (1 mark)
- Line 4: "PC is incremented to point to next instruction" (1 mark)
Common exam questions:
- "Describe the FETCH stage" → Use the 4 steps above, one per line
- "What happens in DECODE?" → Control Unit examines instruction in CIR, works out what operation to perform
- "When does PC increment?" → During FETCH (NOT execute!)
- "When does ACC change?" → During EXECUTE (when ALU completes calculation)
Common mistakes to avoid:
- Saying PC increments during EXECUTE - it's during FETCH!
- Missing the MAR and MDR registers in the FETCH sequence
- Forgetting to mention CIR (Current Instruction Register)
- Saying data changes during DECODE - nothing changes in DECODE!