Knowledge Organiser: Fetch-Decode-Execute Cycle

Fetch: Stage where the next instruction is retrieved from memory into the CPU
Decode: Stage where the Control Unit interprets what the instruction means
Execute: Stage where the ALU carries out the instruction
Instruction: One operation for the CPU to carry out (e.g. ADD 5 means add the value 5)

FETCH sequence (4 steps): PC → MAR; address sent via Address Bus; instruction sent via Data Bus → MDR; PC increments
DECODE: Control Unit reads the fetched instruction — no register values change
EXECUTE: ALU performs the operation; result stored in ACC
PC increments during FETCH — not during decode or execute
ACC is updated during EXECUTE — not during fetch or decode
Nothing changes in registers during DECODE stage
The cycle repeats billions of times per second

FDE cycle is the fundamental operation of every CPU — all programs are just repeated FDE cycles
Fetch path: PC → MAR → Address Bus → memory → Data Bus → MDR
Decode: CU reads the fetched instruction and prepares the correct ALU operation
Execute: ALU performs arithmetic/logic; result overwrites ACC

Saying "Fetch, Decode, Execute" in the wrong order: It is always Fetch THEN Decode THEN Execute — you cannot decode before you have fetched
Forgetting the PC increments during Fetch: The PC increments as part of the Fetch stage, not after — so it already points to the next instruction before Execute finishes
Saying the ALU does the decoding: The Control Unit (CU) decodes the instruction — the ALU only performs calculations during Execute
Mixing up MAR and MDR: The MAR holds the address sent to memory; the MDR holds the instruction or data that comes back along the data bus — they are different registers

Fetch-Decode-Execute Cycle, Knowledge Organiser