Systems ArchitectureDiagram

CPU Registers Detail

Part of MAR & MDR — GCSE Computer Science

This diagram covers CPU Registers Detail within MAR & MDR for GCSE Computer Science. Revise MAR & MDR in Systems Architecture for GCSE Computer Science with 15 exam-style questions and 10 flashcards. This topic appears less often, but it can still be a useful differentiator on mixed-topic papers. It is section 2 of 7 in this topic. Focus on the labels, the relationships between parts, and the explanation that turns the diagram into an exam-ready answer.

Topic position

Section 2 of 7

Practice

15 questions

Recall

10 flashcards

CPU Registers Detail

CPU registers diagram showing the Memory Address Register (MAR) connected to the Address Bus, and Memory Data Register (MDR) connected to the Data Bus, with Program Counter and Accumulator also shown

Keep building this topic

Read this section alongside the surrounding pages in MAR & MDR. That gives you the full topic sequence instead of a single isolated revision point.

The Library Search Deep Dive: How MAR and MDR Work Together MAR - Memory Address Register MDR - Memory Data Register

Practice Questions for MAR & MDR

What does MAR stand for?

A. Memory Access Register
B. Memory Address Register
C. Memory Arithmetic Register
D. Main Address Register

1 markfoundation

Explain the difference between the MAR and the MDR.

2 marksstandard

Quick Recall Flashcards

What does MDR hold?

The actual data being transferred (WHAT)

What does MAR hold?

The address of data to be read/written (WHERE)

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Deep Dive: How MAR and MDR Work Together